CA
Computers Architecture
Objectives
The UC is structured as a software / hardware binomial to understand the relationships between algorithms and application workloads and thus take advantage of the performance of today’s processor technologies. After attending the UC students should be able to:
- Characterize performance metrics in their relation to C / C ++ program coding;
- Identify the impact of explicit / implicit use of the memory hierarchy;
- Describe the concepts associated with instructions execution and the inherent limitations of this paradigm;
- Justify the impact associated with superscalar processor performance;
- Evaluate vector code processing techniques both in processors and accelerators;
- Identify the opportunities to logically and physically explore modern multiprocessor architectures through the use of multithreaded parallelism.
Program
- Performance Assessment Metrics: execution time, average number of clock cycles per instruction (CPI), clock period and number of instructions executed; cycles per element (CPE);
- Memory hierarchy: concepts; locality, organization (mapping, writing and replacement policies);
- Instructional parallelism: pipelining and superscalar;
- Data level parallelism: vector processing;
- Parallelism at the thread level: multicores ;
- Heterogeneous computing: CPUS / GPUS, programming model
Bibliography
- Computer Systems: A Programmer’s Perspective, 3rd Edition; Randal E. Bryant and David R. O’Hallaron, ISBN13: 9780134092669, Pearson, 2016.
- Multicore and GPU Programming An Integrated Approach, Gerassimos Barlas, Elsevier, Inc 2015.
- Computer Organization and Design, David Patterson and John Hennesy, 5th Edition, Elsevier, Inc 2013.
- Parallel Programming for Multicore and Cluster Systems, Thomas Rauber, Gudula Rünger, Springer-Verlag Berlin Heidelberg 2010, 2013
- Computer Architecture, A Quantitative Approach-Morgan Kaufmann, Hennessy&Patterson-, 6th Edition, Elsevier, Inc, 2017.